The present invention relates to a delay circuit and, more particularly, to a delay circuit suitable for use on an oscillation circuit such as a ring oscillator.
In a semiconductor integrated circuit constituted by insulated gate type field effect transistors (referred to as MISFET, hereinafter), an oscillation circuit such as a ring oscillator is constituted by a plurality of inverter circuits which are connected in the form of a ring. The delay of a signal in each inverter circuit takes place in the ring oscillator. Since a plurality of inverter circuits are connected in the form of a ring, the delayed signal is fed back through the circuit loop to cause an oscillation.
Each inverter can be constituted by a driving MISFET having a drain and a source connected between an output node and a grounding terminal and a gate connected to an input node, and a load MISFET having a drain and a source connected between a power supply terminal and the output node and a gate connected to the power supply terminal.
The delay time of each inverter circuit is determined by the conductance characteristics of the driving MISFET and load MISFET, and capacitances connected to the output nodes of respective MISFETs.
However, when the inverter circuit as stated above is used, it is necessary to employ a large number of stages of the inverter circuits, in order to obtain the required delay time or, alternatively, it is difficult to obtain the desired signal level with limited stages of inverter circuits.